In the field of NAND type flash memory, a stacked type (three-dimensional type) NAND type flash memory has been receiving attention as a device capable of achieving a high level of integration without being limited by a resolution limit of lithography technology. This kind of three-dimensional type NAND type flash memory comprises a stacked body in which a plurality of conductive layers each functioning as a word line or select gate line and a plurality of inter-layer insulating layers are stacked alternately on a substrate, and comprises a column shaped semiconductor layer disposed so as to penetrate this stacked body. This semiconductor layer functions as a channel of a memory cell, and disposed sequentially between the semiconductor layer and the conductive layer in the stacked body are a block insulating layer, a memory gate insulating layer including a charge accumulation layer, and a tunnel insulating layer.
Conventionally, polysilicon has often been employed as a material of this semiconductor layer. However, it is difficult to achieve a combination of both film thinning and higher mobility of the channel required in next generation large capacity memory, by polysilicon. Furthermore, there is also a problem that polysilicon has a high process temperature, hence suffers a limitation of process.